The LEO-1 is a complete 16-bit computer system featuring a custom-designed CPU. This project is currently about half way through construction at my home in Santa Ana, California. I started designing the CPU in late May 2015. Originally I did it just for fun in the excellent simulator program Logisim. Once I realised it actually worked, I decided to build it for real. It seems that most CPUs of this type are constructed using wire-wrapping, but I have no experience with that technique and didn't want to complicate things by having to learn new construction methods. So I decided to attempt it using techniques I was familiar with -- perfboards, solder and 74 series integrated circuits. I spent some time looking into the idea of using professionally manufactured PCBs but decided it would be far too expensive. It's a shame because it would have been much easier to build the LEO-1 on PCBs than it is by using perfboards and wire.*

Before doing any soldering, I had to draw the electronic schematics based on the Logisim circuit. During that time I bought components for prototyping and various tools I would need. I did some tests with various components, registers, bus drivers, memory, etc but it took many months to get to the point where I felt I was ready to begin construction. I started with the memory board which is probably the simplest board in the whole system. I started on this at the beginning of October 2015 and discovered that it was a very slow process indeed.

LEO-1 is being built mainly from 74 series HC family chips and it has a few design peculiarities. First, it's rather RISC-like in its design. It is not microcoded, instead the control and instruction signals directly drive the operating logic. It has a very simple instruction set with no complex addressing modes. It can only access memory by loading or storing a register. However, the effective address is the result of an ALU operation on one or two registers, so indexed addressing is possible. It has no condition codes, no hardware stack and no interrupts. Although it has a 24-bit address bus, a lot of the address space is wasted due to its very simple address decoding. It has a purely 16-bit data path and therefore can only address memory and registers as 16-bit words. There is no support for byte operations with the exception of the swhl instruction which swaps the high and low bytes of a register. Furthermore, being a 16-bit machine, the only way I could think of to have an address space of more than 65,536 words was to include a banking scheme which significantly impacted the cost and simplicity of the design.

An explanation of the design, my reasons for doing this project and progress updates can be found in my Progress Blog.

A detailed design document including the instruction set and code examples can be found here.

*UPDATE, November 2016 - I have changed my mind about using PCBs. It took such a phenomenal amount of time to build the memory board that I've decided to just spend the money and have PCBs made for the rest of it. It turns out that it's not as expensive as I had thought. I just had to find the right manufacturer. I'm using Express PCB as their prices are reasonable if you don't bother with the silk screen and solder mask, and they recently started allowing orders of a single board. More here.